The INNOSILICON high performance PLL is a high speed, low jitter frequency synthesizer and developed as an IP block to reduce time to market, risk and cost in the development of Analog Front-End design. It can generate stable high-speed clock from a ultra wide input clock. With excellent supply noise immunity, the PLL is ideal for using in noisy mixed signal SOC environments. This PLL integrates a Phase Frequency Detector (PFD), a Low Pass Filter (LPF), a Voltage Controlled Oscillator and other associated circuit. All fundamental building blocks as well as fully programmable dividers are integrated in the core.
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